Still Alive
In the unlikely event that someone is still reading this, I would like to point out: the project lives.
I am still trying to figure out just how much resemblance to a proper Lisp Machine can be savagely beaten into an AMD Opteron. The focus remains on low-level details of the variety which, when changed, dynamite all subsequent work if one isn't careful. Some examples:
- To what use can we put the address translator?
- Will using page directory offsets as LispM-style tag bits unleash TLB cache havoc? Just how does the latter work under the hood?
- What perverse use could be made of hardware privilege checking in a system which no longer relies on it for security?
- Are SSE opcodes, with their pipe-clogging effects, worth it?
- Lastly, what of the recent Opteron microcode update hack? Unlikely though it may be, any developments on that front could yield a shortcut leading straight to my destination.
If PG with his infinite free time took five years to spit out Arc, no one should fault me for taking a good long while in my effort to create a computing universe from scratch.
Of course page directory offsets can be used for their intended purpose - keeping note of pages. What that can be used for? Of course for orthogonal persistence, which you claim has no support on modern hardware!
And the perverse use of hardware privilege checking - same thing - use it for orthogonal persistence.
A system-level code with high privilege can keep track of all memory pages that change, then write them regularly to the 'orthogonal persistence swap file'. Orthogonal persistence is very very similar to virtual memory and swap files. The difference is only in scope: for virtual memory, only PARTS of memory are saved to swap, and only when not enough physical RAM; in case of orthogonal, you will just save more (everything that changed since last save) and more often (like, every second or whatever....).
So, the same hardware support can be used for orthogonal that is used for virtual.
Ctwctwc